Berkeley RISC projects

E193746

RISC architecture project academic research project computer architecture research project

The Berkeley RISC projects were pioneering academic research efforts at the University of California, Berkeley that developed early Reduced Instruction Set Computer architectures, profoundly influencing modern processor design.

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All labels observed (8)

Label	Occurrences
Berkeley RISC project	5
Berkeley RISC	2
Berkeley RISC I	1
Berkeley RISC project processors	1
Berkeley RISC projects canonical	1
RISC	1
SPUR (Symbolic Processing Using RISC)	1
Titan (Berkeley multiprocessor research)	1

How this entity was disambiguated

This entity first appeared as the object of triple T1717900 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.

NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07

Target entity: Berkeley RISC projects
Context triple: [RISC-V, inspiredBy, Berkeley RISC projects]

A. Acorn RISC Machine
Acorn RISC Machine (ARM) is a family of energy-efficient reduced instruction set computer (RISC) architectures widely used in mobile devices, embedded systems, and increasingly in servers and personal computers.
B. SPARC microprocessor architecture
The SPARC microprocessor architecture is a RISC-based instruction set architecture widely used in high-performance and enterprise servers, originally created to power scalable, multi-processor systems.
C. UCSD p-System
UCSD p-System is a portable operating system and programming environment based on the Pascal language and p-code virtual machine, widely used in the late 1970s and early 1980s across multiple hardware platforms.
D. Project Oberon
Project Oberon is a computer system design and implementation project, including both an operating system and programming language, created by Swiss computer scientist Niklaus Wirth as a minimalist, modular, and educationally oriented computing environment.
E. UCSD Pascal
UCSD Pascal is a variant of the Pascal programming language designed for the UCSD p-System, notable for its portability and use in early microcomputer environments.
F. None of above. chosen
G. Unsure - the case is ambiguous/there is not enough information to decide.

NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07

Target entity: Berkeley RISC projects
Target entity description: The Berkeley RISC projects were pioneering academic research efforts at the University of California, Berkeley that developed early Reduced Instruction Set Computer architectures, profoundly influencing modern processor design.

A. Acorn RISC Machine
Acorn RISC Machine (ARM) is a family of energy-efficient reduced instruction set computer (RISC) architectures widely used in mobile devices, embedded systems, and increasingly in servers and personal computers.
B. SPARC microprocessor architecture
The SPARC microprocessor architecture is a RISC-based instruction set architecture widely used in high-performance and enterprise servers, originally created to power scalable, multi-processor systems.
C. UCSD p-System
UCSD p-System is a portable operating system and programming environment based on the Pascal language and p-code virtual machine, widely used in the late 1970s and early 1980s across multiple hardware platforms.
D. Project Oberon
Project Oberon is a computer system design and implementation project, including both an operating system and programming language, created by Swiss computer scientist Niklaus Wirth as a minimalist, modular, and educationally oriented computing environment.
E. UCSD Pascal
UCSD Pascal is a variant of the Pascal programming language designed for the UCSD p-System, notable for its portability and use in early microcomputer environments.
F. None of above. chosen

Statements (49)

Predicate	Object
instanceOf	RISC architecture project ⓘ academic research project ⓘ computer architecture research project ⓘ
academicDepartment	UC Berkeley Department of Electrical Engineering and Computer Sciences ⓘ linked to: Department of Electrical Engineering and Computer Sciences, UC Berkeley
affiliation	University of California, Berkeley ⓘ
basedOn	Reduced Instruction Set Computer principles ⓘ
coreIdea	close coupling of compiler and architecture design ⓘ hardwired control instead of microcode ⓘ large register file ⓘ load-store architecture ⓘ simplified instruction set ⓘ single-cycle instruction execution where possible ⓘ
country	United States ⓘ linked to: United States of America
developer	David A. Patterson ⓘ
field	Reduced Instruction Set Computing ⓘ linked to: RISC architecture computer architecture ⓘ computer engineering ⓘ
goal	demonstrate feasibility of RISC in VLSI ⓘ improve performance through architectural simplification ⓘ
hasPart	Berkeley RISC I ⓘ linked to: Berkeley RISC projects Berkeley RISC II ⓘ linked to: RISC II SOAR (Smalltalk On A RISC) ⓘ SPUR (Symbolic Processing Using RISC) ⓘ linked to: Berkeley RISC projects Titan (Berkeley multiprocessor research) ⓘ linked to: Berkeley RISC projects
influenced	MIPS architecture ⓘ SPARC architecture ⓘ linked to: SPARC microprocessor architecture academic computer architecture curricula ⓘ compiler-architecture co-design ⓘ embedded RISC processors ⓘ instruction pipeline design ⓘ modern RISC microprocessors ⓘ out-of-order RISC implementations ⓘ
influencedBy	IBM 801 project ⓘ earlier microprocessor design research ⓘ
locatedIn	University of California, Berkeley ⓘ
notablePerson	Carlo H. Séquin ⓘ David A. Patterson ⓘ John L. Hennessy ⓘ
notablePublication	"Reduced Instruction Set Computer" papers by Patterson and colleagues ⓘ linked to: RISC architecture early ISCA papers on RISC I and RISC II ⓘ
notableWork	RISC I microprocessor ⓘ linked to: RISC I RISC II microprocessor ⓘ linked to: RISC II early RISC pipeline designs ⓘ load-store architecture prototypes ⓘ register window mechanisms ⓘ
significance	pioneering RISC architecture research ⓘ profound influence on modern processor design ⓘ
startTime	early 1980s ⓘ
timePeriod	1980s ⓘ

How these facts were elicited