IEEE 1687 embedded instrumentation standard
E912829
IEEE 1687 embedded instrumentation standard is a test access architecture standard that defines a scalable, reconfigurable method for accessing on-chip instruments and debug features through a JTAG-based interface.
All labels observed (1)
| Label | Occurrences |
|---|---|
| IEEE 1687 embedded instrumentation standard canonical | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T11226587 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: IEEE 1687 embedded instrumentation standard Context triple: [IEEE 1500 embedded core test standard, relatedTo, IEEE 1687 embedded instrumentation standard]
-
A.
IEEE 1500 embedded core test standard
The IEEE 1500 embedded core test standard defines a structured test access and wrapper architecture for testing individual IP cores within system-on-chip (SoC) designs.
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B.
IEEE 1532
IEEE 1532 is an extension of the JTAG boundary-scan standard that defines in-system programming and configuration procedures for programmable devices such as FPGAs and CPLDs.
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C.
IEEE 1149 family of standards
The IEEE 1149 family of standards is a set of Joint Test Action Group (JTAG) boundary-scan specifications that define methods for testing, debugging, and accessing digital integrated circuits and boards.
-
D.
IEEE 1496-1993
IEEE 1496-1993 is an IEEE standard that specifies the SBus computer bus architecture used primarily in Sun Microsystems workstations and servers.
-
E.
IEEE Std 610.12-2010
IEEE Std 610.12-2010 is an updated IEEE standard that provides a formal glossary of terms and definitions used in software engineering.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: IEEE 1687 embedded instrumentation standard Target entity description: IEEE 1687 embedded instrumentation standard is a test access architecture standard that defines a scalable, reconfigurable method for accessing on-chip instruments and debug features through a JTAG-based interface.
-
A.
IEEE 1500 embedded core test standard
The IEEE 1500 embedded core test standard defines a structured test access and wrapper architecture for testing individual IP cores within system-on-chip (SoC) designs.
-
B.
IEEE 1532
IEEE 1532 is an extension of the JTAG boundary-scan standard that defines in-system programming and configuration procedures for programmable devices such as FPGAs and CPLDs.
-
C.
IEEE 1149 family of standards
The IEEE 1149 family of standards is a set of Joint Test Action Group (JTAG) boundary-scan specifications that define methods for testing, debugging, and accessing digital integrated circuits and boards.
-
D.
IEEE 1496-1993
IEEE 1496-1993 is an IEEE standard that specifies the SBus computer bus architecture used primarily in Sun Microsystems workstations and servers.
-
E.
IEEE Std 610.12-2010
IEEE Std 610.12-2010 is an updated IEEE standard that provides a formal glossary of terms and definitions used in software engineering.
- F. None of above. chosen
Statements (40)
| Predicate | Object |
|---|---|
| instanceOf |
IEEE standard
ⓘ
technical standard ⓘ test access architecture standard ⓘ |
| alsoKnownAs |
IEEE 1687
ⓘ
IJTAG ⓘ |
| appliesTo |
complex integrated circuits
ⓘ
embedded test and measurement instruments ⓘ system-on-chip devices ⓘ |
| basedOn |
IEEE 1149.1
ⓘ
linked to:
IEEE 1149 family of standards
|
| category |
hardware debug standard
ⓘ
testability standard ⓘ |
| compatibleWith |
IEEE 1149.1 boundary-scan architecture
ⓘ
linked to:
IEEE 1149.1 JTAG boundary‑scan standard
|
| concerns |
instrument access procedures
ⓘ
instrument connectivity description ⓘ test access infrastructure ⓘ |
| defines |
reconfigurable method for accessing on-chip instruments
ⓘ
scalable method for accessing on-chip instruments ⓘ test access architecture for embedded instruments ⓘ |
| field |
design for testability
ⓘ
electronic design automation ⓘ integrated circuit testing ⓘ on-chip instrumentation ⓘ |
| goal |
enable reconfigurable instrument access networks
ⓘ
improve scalability of test access mechanisms ⓘ provide uniform access to heterogeneous on-chip instruments ⓘ |
| hasAbbreviation | IJTAG ⓘ |
| publishedBy |
IEEE Standards Association
ⓘ
Institute of Electrical and Electronics Engineers ⓘ |
| relatedTo |
IEEE 1149.1 boundary-scan standard
ⓘ
linked to:
IEEE 1149.1 JTAG boundary‑scan standard
IEEE 1500 embedded core test standard ⓘ |
| standardNumber |
IEEE Std 1687
ⓘ
linked to:
IEEE 1687
|
| supports |
access to embedded instruments
ⓘ
access to on-chip debug features ⓘ in-system test ⓘ post-silicon validation ⓘ silicon debug ⓘ |
| usedFor |
board-level test via chip-level instruments
ⓘ
field diagnostics ⓘ production test ⓘ |
| usesInterface | JTAG-based interface ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: IEEE 1687 embedded instrumentation standard Description of subject: IEEE 1687 embedded instrumentation standard is a test access architecture standard that defines a scalable, reconfigurable method for accessing on-chip instruments and debug features through a JTAG-based interface.
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.