Intel AVX2
E165095
Intel AVX2 is an x86 instruction set extension from Intel that enhances performance for integer-heavy and vectorized workloads through wider SIMD operations and new vector instructions.
All labels observed (4)
| Label | Occurrences |
|---|---|
| AVX2 | 9 |
| Intel AVX2 canonical | 7 |
| Intel AVX2 instruction set | 1 |
| Intel Advanced Vector Extensions | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T1422854 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: Intel AVX2 Context triple: [Intel Xeon, supportsFeature, Intel AVX2]
-
A.
Intel AVX
Intel AVX is an x86 processor instruction set extension from Intel that accelerates floating-point and vector-intensive workloads, commonly used in high-performance computing, multimedia, and scientific applications.
-
B.
SSE2
SSE2 is an x86 processor instruction set extension introduced by Intel that adds advanced SIMD (Single Instruction, Multiple Data) capabilities for faster floating-point and integer computations.
-
C.
Intel AES-NI
Intel AES-NI is a set of hardware instructions introduced by Intel to accelerate and secure AES encryption and decryption operations in modern processors.
-
D.
Intel 64
Intel 64 is Intel’s 64-bit architecture extension that enables x86 processors to handle 64-bit computing, including larger memory addressing and enhanced performance for modern applications.
-
E.
Intel VT-x
Intel VT-x is Intel's hardware-assisted virtualization technology that enables more efficient and secure running of multiple operating systems on x86 processors.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: Intel AVX2 Target entity description: Intel AVX2 is an x86 instruction set extension from Intel that enhances performance for integer-heavy and vectorized workloads through wider SIMD operations and new vector instructions.
-
A.
Intel AVX
Intel AVX is an x86 processor instruction set extension from Intel that accelerates floating-point and vector-intensive workloads, commonly used in high-performance computing, multimedia, and scientific applications.
-
B.
SSE2
SSE2 is an x86 processor instruction set extension introduced by Intel that adds advanced SIMD (Single Instruction, Multiple Data) capabilities for faster floating-point and integer computations.
-
C.
Intel AES-NI
Intel AES-NI is a set of hardware instructions introduced by Intel to accelerate and secure AES encryption and decryption operations in modern processors.
-
D.
Intel 64
Intel 64 is Intel’s 64-bit architecture extension that enables x86 processors to handle 64-bit computing, including larger memory addressing and enhanced performance for modern applications.
-
E.
Intel VT-x
Intel VT-x is Intel's hardware-assisted virtualization technology that enables more efficient and secure running of multiple operating systems on x86 processors.
- F. None of above. chosen
Statements (47)
| Predicate | Object |
|---|---|
| instanceOf |
SIMD instruction set
ⓘ
instruction set extension ⓘ x86 extension ⓘ |
| alsoImplementedBy | AMD processors ⓘ |
| architecture |
x86
ⓘ
x86-64 ⓘ |
| availableOn |
many Intel Core processors
ⓘ
many Intel Xeon processors ⓘ |
| backwardCompatibleWith | Intel AVX ⓘ |
| dataTypeSupport |
double-precision floating-point vectors
ⓘ
integer vectors ⓘ single-precision floating-point vectors ⓘ |
| definedIn | Intel 64 and IA-32 Architectures Software Developer’s Manual ⓘ |
| developer |
Intel
ⓘ
linked to:
Intel Corporation
|
| extends |
Intel AVX 256-bit SIMD model
ⓘ
linked to:
Intel AVX
|
| featureFlag | AVX2 CPUID bit ⓘ |
| firstSupportedBy | Intel Haswell microarchitecture ⓘ |
| follows | Intel AVX ⓘ |
| improvesPerformanceFor |
cryptographic workloads
ⓘ
image processing applications ⓘ integer-heavy workloads ⓘ media encoding and decoding ⓘ scientific computing workloads ⓘ signal processing applications ⓘ vectorized workloads ⓘ |
| introducedIn | 2013 ⓘ |
| partOf |
Intel Advanced Vector Extensions
ⓘ
linked to:
Intel AVX2
|
| precedes |
Intel AVX-512
ⓘ
linked to:
AVX-512
|
| registerWidth | 256 bits ⓘ |
| requires |
XSAVE/XRESTORE support for extended registers
ⓘ
operating system support for YMM state saving ⓘ |
| standardizedAs | part of x86-64 ISA extensions ⓘ |
| supports |
256-bit integer SIMD operations
ⓘ
256-bit vector integer arithmetic ⓘ Fused Multiply-Add via FMA3 (with separate feature flag) ⓘ gather instructions ⓘ mask-based operations ⓘ vector bitwise operations ⓘ vector blend instructions ⓘ vector compare instructions ⓘ vector insert and extract instructions ⓘ vector integer multiply instructions ⓘ vector permute instructions ⓘ vector shift instructions ⓘ |
| targetDomain |
data-parallel applications
ⓘ
high-performance computing ⓘ |
| usesRegisterFile | YMM registers ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: Intel AVX2 Description of subject: Intel AVX2 is an x86 instruction set extension from Intel that enhances performance for integer-heavy and vectorized workloads through wider SIMD operations and new vector instructions.
Referenced by (18)
Full triples — surface form annotated when it differs from this entity's canonical label.
linked to: Intel AVX2
linked to: Intel AVX2
linked to: Intel AVX2
linked to: Intel AVX2
linked to: Intel AVX2
linked to: Intel AVX2
linked to: Intel AVX2
linked to: Intel AVX2
linked to: Intel AVX2