bitWidth
P4121
predicate
Indicates the number of bits used to represent or encode a given value, type, or data element.
All labels observed (69)
| Label | Occurrences |
|---|---|
| wordSize | 237 |
| bitWidth canonical | 146 |
| dataBusWidth | 65 |
| addressBusWidth | 61 |
| busWidth | 42 |
| cpuBitWidth | 42 |
| registerWidth | 29 |
| dataPathWidth | 27 |
| memoryBusWidth | 19 |
| bitArchitecture | 17 |
| bitDepth | 13 |
| architectureWidth | 11 |
| bitLength | 10 |
| bitDepthSupport | 6 |
| cpuWordSize | 6 |
| supportsAddressWidth | 6 |
| instructionSetWidth | 5 |
| audioBitDepth | 4 |
| bitSize | 4 |
| definesBitDepth | 4 |
| storesBitsPerCell | 4 |
| addressSpaceWidth | 3 |
| bits | 3 |
| blockSizeBits | 3 |
| entrySizeInBits | 3 |
| hasBitDepth | 3 |
| hasBitWidth | 3 |
| usesBitWidth | 3 |
| bitDepthSupported | 2 |
| bitDepthTypical | 2 |
| definesBitLength | 2 |
| hasWordSizeBits | 2 |
| ALUWidth | 1 |
| QoSSubfieldBitLength | 1 |
| Z80BusWidth | 1 |
| adcResolutionBits | 1 |
| bitPerSymbol | 1 |
| bitUsage | 1 |
| bitplanesMax | 1 |
| blockFunctionOutputBits | 1 |
| blockFunctionSize | 1 |
| blockPermutationWidth | 1 |
| busWidthData | 1 |
| controlBusWidth | 1 |
| definesBitWidth | 1 |
| expansionBusWidth | 1 |
| externalDataBusWidth | 1 |
| floatingPointRegisterSize | 1 |
| hardwareBitWidth | 1 |
| hasDataBusWidth | 1 |
| hasOpcodeWidth | 1 |
| instructionPointerSize | 1 |
| integerRegisterWidth | 1 |
| internalDataPathWidth | 1 |
| macAddressLengthBits | 1 |
| memoryAddressWidth | 1 |
| opmaskRegisterWidth | 1 |
| outputSizeBits | 1 |
| parityBitLength | 1 |
| precedenceFieldBitLength | 1 |
| registerWidthBits | 1 |
| registerWidthInAArch64 | 1 |
| reservedBitLength | 1 |
| returnTypeWidth | 1 |
| unifiedMemoryBusWidth | 1 |
| usesBusWidth | 1 |
| wordLengthBits | 1 |
| wordLengthInBits | 1 |
| wordSizeInternal | 1 |
Description generation (PDg)
The one-sentence description above was generated by prompting gpt-5.1 with the predicate name and this instruction.
Instruction
Given a predicate that represents a relationship or action between entities, generate a one-sentence description explaining its meaning. # Instructions Focus on describing the relationship, not the entities themselves. # Response Format Begin the description with \' Indicates...\'
Input
Predicate: bitWidth
Generated description
Indicates the number of bits used to represent or encode a given value, type, or data element.
Sample triples (824)
| Subject | Object |
|---|---|
| Norsk Data NORD-10 | 16 ⓘ |
| Unicode | 21-bit code space via predicate surface "usesBitWidth" ⓘ |
|
Honeywell DDP-516
linked to:
Honeywell DDP-516 minicomputer
|
16-bit ⓘ |
| Honeywell DDP-516 | 16 bits via predicate surface "dataPathWidth" ⓘ |
| IBM PC | 16-bit internal, 8-bit external bus via predicate surface "cpuWordSize" ⓘ |
| IBM PC | 8-bit via predicate surface "busWidth" ⓘ |
| ATA | 16-bit via predicate surface "dataBusWidth" ⓘ |
| Motorola 68000 family | 16/32-bit via predicate surface "bitArchitecture" ⓘ |
| Motorola 68000 family | 24-bit (original 68000) via predicate surface "addressBusWidth" ⓘ |
| Motorola 68000 family | 16-bit (original 68000) via predicate surface "dataBusWidth" ⓘ |
| Motorola 68000 family | 32-bit general-purpose registers via predicate surface "registerWidth" ⓘ |
| IBM System/360 | 32-bit via predicate surface "wordSize" ⓘ |
| PowerPC | 32-bit via predicate surface "wordSize" ⓘ |
| PowerPC | 64-bit via predicate surface "wordSize" ⓘ |
| ChaCha20 | 32-bit via predicate surface "wordSize" ⓘ |
| ChaCha20 | 512-bit via predicate surface "blockFunctionSize" ⓘ |
| Arecibo message | 1679 bits via predicate surface "bitLength" ⓘ |
|
Macintosh 128K
linked to:
original Macintosh 128K
|
16-bit data bus via predicate surface "busWidth" ⓘ |
| RCA 1802 microprocessor | 8-bit via predicate surface "dataBusWidth" ⓘ |
| RCA 1802 microprocessor | 16-bit via predicate surface "addressBusWidth" ⓘ |
| RCA 1802 microprocessor | 8-bit via predicate surface "wordSize" ⓘ |
| RCA 1802 microprocessor | 16-bit via predicate surface "registerWidth" ⓘ |
|
RC4
linked to:
RC4 stream cipher
|
1 via predicate surface "blockSizeBits" ⓘ |
| UTF-32 | 32 bits per code point via predicate surface "usesBitWidth" ⓘ |
| ASCII | 7-bit via predicate surface "usesBitWidth" ⓘ |
| sRGB | 8 bits per channel via predicate surface "bitDepthTypical" ⓘ |
| sRGB | 16 bits per channel via predicate surface "bitDepthSupported" ⓘ |
| Honeywell 316 | 16 bits via predicate surface "wordSize" ⓘ |
| Honeywell 316 | 16 ⓘ |
| Honeywell 316 | 16 bits via predicate surface "dataPathWidth" ⓘ |
| ISO/IEC 8859-1 | 8 bits ⓘ |
| Intel 8086 | 16 bits via predicate surface "wordSize" ⓘ |
| Intel 8086 | 16 bits via predicate surface "dataBusWidth" ⓘ |
| Intel 8086 | 20 bits via predicate surface "addressBusWidth" ⓘ |
| Intel 8086 | 16 bits via predicate surface "registerWidth" ⓘ |
| Intel 8086 | 16 bits via predicate surface "dataPathWidth" ⓘ |
| Intel Pentium | 32-bit via predicate surface "wordSize" ⓘ |
| Intel 4004 | 4-bit via predicate surface "dataBusWidth" ⓘ |
| Intel 4004 | 12-bit via predicate surface "addressBusWidth" ⓘ |
| MDA | 8-bit via predicate surface "busWidth" ⓘ |
| ISA | 8-bit via predicate surface "busWidth" ⓘ |
| ISA | 16-bit via predicate surface "busWidth" ⓘ |
| ISA | 8-bit via predicate surface "dataBusWidth" ⓘ |
| ISA | 16-bit via predicate surface "dataBusWidth" ⓘ |
| ISA | 24-bit via predicate surface "addressBusWidth" ⓘ |
| Intel 8088 | 16-bit via predicate surface "wordSizeInternal" ⓘ |
| Intel 8088 | 20-bit via predicate surface "addressBusWidth" ⓘ |
| Intel 8088 | 16-bit via predicate surface "ALUWidth" ⓘ |
| Intel 8088 | 16-bit via predicate surface "registerWidth" ⓘ |
| Intel 8088 | 16-bit via predicate surface "internalDataPathWidth" ⓘ |