Spike

E736982

Spike is a reference RISC-V instruction set simulator used to model, test, and validate RISC-V processor implementations.

All labels observed (1)

Label Occurrences
Spike canonical 2

How this entity was disambiguated

Statements (31)

Predicate Object
instanceOf RISC-V instruction set simulator ⓘ
reference simulator ⓘ
software tool ⓘ
developedBy RISC-V community ⓘ
executionMode instruction set simulation ⓘ
hasFeature command-line interface ⓘ
configurable ISA features ⓘ
cycle-approximate functional simulation ⓘ
support for multiple RISC-V cores in one simulation ⓘ
implementationLanguage C++ ⓘ
license open source license ⓘ
partOfEcosystem RISC-V software and tooling ecosystem ⓘ
repositoryHosting GitHub ⓘ
simulates RISC-V cores ⓘ
RISC-V instructions ⓘ
supports RISC-V privileged architecture ⓘ
RISC-V user-level ISA ⓘ
multiple RISC-V extensions ⓘ
supportsArchitecture RISC-V ⓘ
targetUsers RISC-V implementers ⓘ
RISC-V researchers ⓘ
usedAs golden reference model for RISC-V ISA ⓘ
usedBy RISC-V software developers ⓘ
hardware designers ⓘ
verification engineers ⓘ
usedFor ISA compliance checking ⓘ
debugging RISC-V software ⓘ
early software bring-up ⓘ
modeling RISC-V processor implementations ⓘ
testing RISC-V processor implementations ⓘ
validating RISC-V processor implementations ⓘ

How these facts were elicited

Referenced by (2)

Full triples — surface form annotated when it differs from this entity's canonical label.