TSMC N7P

E938596

TSMC N7P is an enhanced 7-nanometer semiconductor manufacturing process from TSMC that offers improved performance and power efficiency over its predecessor and is used for advanced mobile and computing chips.

All labels observed (3)

Label Occurrences
TSMC 7 nm 2
TSMC 7 nm family 1
TSMC N7P canonical 1

How this entity was disambiguated

Statements (46)

Predicate Object
instanceOf TSMC 7 nm process variant ⓘ
semiconductor manufacturing process ⓘ
commercialAvailability mass production by late 2010s ⓘ
competesWith Samsung 7 nm LPP process ⓘ
countryOfManufacture Taiwan ⓘ
density similar to TSMC N7 ⓘ
designEntry uses same PDK generation as N7 with enhancements ⓘ
designGoal drop‑in upgrade path from N7 ⓘ
designReuse allows reuse of N7 IP with minimal changes ⓘ
designRuleCompatibility fully compatible with TSMC N7 design rules ⓘ
ecosystem supported by major EDA vendors ⓘ
family TSMC 7 nm family ⓘ
linked to: TSMC N7P
improvementOver TSMC N7 ⓘ
introducedBy Taiwan Semiconductor Manufacturing Company Limited ⓘ
linked to: TSMC
libraryCompatibility compatible with many N7 standard cell libraries ⓘ
lithographyType DUV ⓘ
manufacturer TSMC ⓘ
marketingPosition performance‑enhanced 7 nm process ⓘ
marketSegment data‑center and server processors ⓘ
high‑end consumer electronics ⓘ
premium smartphones ⓘ
maskCount similar mask count to TSMC N7 ⓘ
nodeClass advanced logic process ⓘ
optimizationFocus performance optimization ⓘ
power optimization ⓘ
performance improved vs TSMC N7 ⓘ
performanceGainOverPredecessor up to 7% at same power ⓘ
powerEfficiency improved vs TSMC N7 ⓘ
powerPerformanceAreaTradeoff better power and performance at similar area to N7 ⓘ
powerReductionOverPredecessor up to 10% at same performance ⓘ
predecessor TSMC N7 ⓘ
processNode 7 nm ⓘ
requiresDesignMigration no full redesign required from N7 ⓘ
successor TSMC N6 ⓘ
TSMC N7+ (N7 Plus) ⓘ
linked to: TSMC N7
supports advanced computing chips ⓘ
advanced mobile chipsets ⓘ
targetApplications GPUs ⓘ
application processors ⓘ
high‑performance computing chips ⓘ
mobile SoCs ⓘ
networking ASICs ⓘ
transistorType FinFET ⓘ
usedIn various flagship mobile SoCs of late 2010s ⓘ
usesEUV no ⓘ
waferSize 300 mm ⓘ

How these facts were elicited

Referenced by (4)

Full triples — surface form annotated when it differs from this entity's canonical label.

Zen 3 → processNode → TSMC 7 nm ⓘ
linked to: TSMC N7P
NVIDIA A100 → processNode → TSMC 7 nm ⓘ
linked to: TSMC N7P
TSMC N7P → family → TSMC 7 nm family ⓘ
linked to: TSMC N7P