Questa

E656350

Questa is a hardware design and verification software suite from Mentor Graphics used for simulating and validating complex digital circuits and systems.

All labels observed (1)

Label Occurrences
Questa canonical 1

How this entity was disambiguated

Statements (51)

Predicate Object
instanceOf digital circuit simulator ⓘ
hardware design and verification software suite ⓘ
competesWith Cadence Xcelium ⓘ
Synopsys VCS ⓘ
developer Mentor Graphics ⓘ
Siemens EDA ⓘ
domain electronic design automation ⓘ
semiconductor design ⓘ
feature assertion-based verification ⓘ
clock-domain crossing analysis ⓘ
code coverage analysis ⓘ
constraint random stimulus generation ⓘ
coverage-driven verification ⓘ
debugging environment for HDL designs ⓘ
formal property checking ⓘ
functional coverage analysis ⓘ
graphical waveform viewer ⓘ
integration with verification management tools ⓘ
mixed-language simulation ⓘ
power-aware simulation ⓘ
formerlyKnownAs ModelSim family extension ⓘ
hasComponent Questa CDC ⓘ
Questa CoverCheck ⓘ
Questa Formal ⓘ
Questa LP ⓘ
Questa Sim ⓘ
Questa Verification IP ⓘ
operatingSystem Linux ⓘ
Windows ⓘ
ownedBy Siemens ⓘ
relatedTo ModelSim ⓘ
supportsLanguage SystemC ⓘ
SystemVerilog ⓘ
VHDL ⓘ
Verilog ⓘ
supportsStandard OVM ⓘ
SystemVerilog Assertions ⓘ
linked to: SystemVerilog

UVM ⓘ
VHDL-2008 ⓘ
linked to: VHDL
targetUser ASIC designers ⓘ
FPGA designers ⓘ
hardware design engineers ⓘ
verification engineers ⓘ
usedFor RTL simulation ⓘ
formal verification ⓘ
functional verification of integrated circuits ⓘ
gate-level simulation ⓘ
hardware design verification ⓘ
low-power verification ⓘ
simulation of digital circuits ⓘ
system-level verification ⓘ

How these facts were elicited

Referenced by (1)

Full triples — surface form annotated when it differs from this entity's canonical label.

Mentor Graphics → product → Questa ⓘ