Triple
T38556456
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | ARM big.LITTLE heterogeneous computing |
E925257
|
entity |
| Predicate | usesCoreType |
P18973
|
FINISHED |
| Object |
ARM Cortex-A15
ARM Cortex-A15 is a high-performance 32-bit ARM processor core designed for mobile and embedded systems, emphasizing strong computational power and support for advanced operating systems like Linux and Android.
|
E2274109
|
NE FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: ARM Cortex-A15 | Statement: [ARM big.LITTLE heterogeneous computing, usesCoreType, ARM Cortex-A15]
NEDg
Description generation
gpt-5.1
Instruction
Generate a one-sentence description of the target entity. You are given a context triple in the form (subject, predicate, object), where the object is the target entity. # Instructions Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. Avoid repeating the information from the triple, unless really essential. # Response Format Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: ARM Cortex-A15 Triple: [ARM big.LITTLE heterogeneous computing, usesCoreType, ARM Cortex-A15]
Generated description
ARM Cortex-A15 is a high-performance 32-bit ARM processor core designed for mobile and embedded systems, emphasizing strong computational power and support for advanced operating systems like Linux and Android.
Provenance (5 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69f76eaeb69c8190b367df9330d6f6af |
completed | May 3, 2026, 3:50 p.m. |
| NER | Named-entity recognition | batch_69fe92879678819096de6cc1353d14ba |
completed | May 9, 2026, 1:48 a.m. |
| NED1 | Entity disambiguation (via context triple) | batch_6a41e0418274819088dfdc4c8c0f7190 |
completed | June 29, 2026, 3:02 a.m. |
| NEDg | Description generation | batch_6a41e0f0242c81909f8320932f505aca |
completed | June 29, 2026, 3:05 a.m. |
| NED2 | Entity disambiguation (via description) | batch_6a41e14b84e881908f0c039d5101b5e5 |
completed | June 29, 2026, 3:06 a.m. |
Created at: May 3, 2026, 4:32 p.m.