Triple

T36490709
Position Surface form Disambiguated ID Type / Status
Subject Department of Electrical Engineering, IIT Delhi E899043 entity
Predicate hasLaboratory P105 FINISHED
Object microelectronics and VLSI laboratory
The microelectronics and VLSI laboratory is a specialized research and teaching facility focused on semiconductor devices, integrated circuits, and very-large-scale integration technologies.
 E1813495 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: microelectronics and VLSI laboratory | Statement: [Department of Electrical Engineering, IIT Delhi, hasLaboratory, microelectronics and VLSI laboratory]
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: microelectronics and VLSI laboratory
Triple: [Department of Electrical Engineering, IIT Delhi, hasLaboratory, microelectronics and VLSI laboratory]
Generated description
The microelectronics and VLSI laboratory is a specialized research and teaching facility focused on semiconductor devices, integrated circuits, and very-large-scale integration technologies.

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69f76e5ad4588190bdbce60c52fbb785 completed May 3, 2026, 3:48 p.m.
NER Named-entity recognition batch_69f7be26cb348190af35b00e620de9df completed May 3, 2026, 9:29 p.m.
NED1 Entity disambiguation (via context triple) batch_6a39cfe280988190a943c6305fa15bdc completed June 23, 2026, 12:14 a.m.
NEDg Description generation batch_6a39d06ec8448190bce52dd9dcb925f4 completed June 23, 2026, 12:16 a.m.
NED2 Entity disambiguation (via description) batch_6a39d12766ac8190a505dd6d49293937 completed June 23, 2026, 12:19 a.m.
Created at: May 3, 2026, 4:10 p.m.