Triple

T25177295
Position Surface form Disambiguated ID Type / Status
Subject Intel Pentium M E630482 entity
Predicate formsBasisOf P7051 FINISHED
Object Intel Core microarchitecture
The Intel Core microarchitecture is a power-efficient, high-performance CPU design that succeeded NetBurst and underpinned several generations of Intel’s Core processors for desktops and laptops.
 E1670940 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Intel Core microarchitecture | Statement: [Intel Pentium M, formsBasisOf, Intel Core microarchitecture]
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: Intel Core microarchitecture
Triple: [Intel Pentium M, formsBasisOf, Intel Core microarchitecture]
Generated description
The Intel Core microarchitecture is a power-efficient, high-performance CPU design that succeeded NetBurst and underpinned several generations of Intel’s Core processors for desktops and laptops.

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69e75a88fdf081908e47ae6e195c14e1 completed April 21, 2026, 11:07 a.m.
NER Named-entity recognition batch_69f46dc1ddd0819089722f45adc50d84 completed May 1, 2026, 9:09 a.m.
NED1 Entity disambiguation (via context triple) batch_6a1067c8430c8190b3d8046c265c9800 completed May 22, 2026, 2:27 p.m.
NEDg Description generation batch_6a10695d0e648190b51f82934d5f2800 completed May 22, 2026, 2:34 p.m.
NED2 Entity disambiguation (via description) batch_6a1069d0ba8c81908b38818567784552 completed May 22, 2026, 2:36 p.m.
Created at: April 21, 2026, 12:34 p.m.