Triple

T21007879
Position Surface form Disambiguated ID Type / Status
Subject MIPS R5000 E517460 entity
Predicate predecessor P97 FINISHED
Object MIPS R4000 E1458015 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: MIPS R4000 | Statement: [MIPS R5000, predecessor, MIPS R4000]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: MIPS R4000
Context triple: [MIPS R5000, predecessor, MIPS R4000]
  • A. MIPS R4600
    The MIPS R4600 is a 64-bit RISC microprocessor from the MIPS family, widely used in mid-1990s workstations and embedded systems for its balance of performance and cost.
  • B. MIPS R4700
    The MIPS R4700 is a 64-bit RISC microprocessor from MIPS Technologies designed for embedded and workstation applications, offering improved performance and efficiency over earlier MIPS4-based CPUs.
  • C. MIPS R5000
    The MIPS R5000 is a 64-bit RISC microprocessor from the MIPS family, widely used in mid-1990s workstations and embedded systems for its balance of performance and cost.
  • D. MIPS R4000 family chosen
    The MIPS R4000 family is a line of 64-bit RISC microprocessors from MIPS Technologies that introduced the MIPS III architecture and was widely used in workstations, servers, and embedded systems in the 1990s.
  • E. MIPS R3000
    The MIPS R3000 is a 32-bit RISC microprocessor widely used in late-1980s and early-1990s workstations, servers, and embedded systems.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69e0b50192308190a284fcc89dd23a49 completed April 16, 2026, 10:08 a.m.
NER Named-entity recognition batch_69e6fc3cc8648190b1a419ef734a69e6 completed April 21, 2026, 4:25 a.m.
NED1 Entity disambiguation (via context triple) batch_6a09473a781c81909beff9c6164f4ca7 completed May 17, 2026, 4:42 a.m.
Created at: April 16, 2026, 1:53 p.m.