Triple

T18341941
Position Surface form Disambiguated ID Type / Status
Subject General Roberto Fierro Villalobos International Airport E439428 entity
Predicate icaoCode P419 FINISHED
Object MMCU
MMCU is the ICAO airport code for General Roberto Fierro Villalobos International Airport serving Chihuahua, Mexico.
E1319885 NE FINISHED

How this triple was built (4 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: MMCU | Statement: [General Roberto Fierro Villalobos International Airport, icaoCode, MMCU]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: MMCU
Context triple: [General Roberto Fierro Villalobos International Airport, icaoCode, MMCU]
  • A. MMU
    MMU is a large public university in Manchester, England, known for its diverse academic programs and strong links with industry and the creative sectors.
  • B. MMU
    MMU is the IATA airport code for Morristown Municipal Airport, a general aviation airport serving the Morristown, New Jersey area.
  • C. MMU
    MMU is a NASA-developed, self-contained jetpack-like device that allowed astronauts to move freely in space without being tethered to the spacecraft.
  • D. MCHP
    MCHP is the stock ticker symbol for Microchip Technology Inc., a major semiconductor company known for its microcontrollers, analog, and mixed-signal integrated circuits.
  • E. TriCore
    TriCore is a 32-bit microcontroller CPU architecture developed by Infineon that combines RISC, DSP, and microcontroller features for real-time embedded applications.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: MMCU
Triple: [General Roberto Fierro Villalobos International Airport, icaoCode, MMCU]
Generated description
MMCU is the ICAO airport code for General Roberto Fierro Villalobos International Airport serving Chihuahua, Mexico.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07
Target entity: MMCU
Target entity description: MMCU is the ICAO airport code for General Roberto Fierro Villalobos International Airport serving Chihuahua, Mexico.
  • A. MMU
    MMU is a large public university in Manchester, England, known for its diverse academic programs and strong links with industry and the creative sectors.
  • B. MMU
    MMU is the IATA airport code for Morristown Municipal Airport, a general aviation airport serving the Morristown, New Jersey area.
  • C. MMU
    MMU is a NASA-developed, self-contained jetpack-like device that allowed astronauts to move freely in space without being tethered to the spacecraft.
  • D. MCHP
    MCHP is the stock ticker symbol for Microchip Technology Inc., a major semiconductor company known for its microcontrollers, analog, and mixed-signal integrated circuits.
  • E. TriCore
    TriCore is a 32-bit microcontroller CPU architecture developed by Infineon that combines RISC, DSP, and microcontroller features for real-time embedded applications.
  • F. None of above. chosen

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d8b9175fec8190af865699b4e64d8c completed April 10, 2026, 8:47 a.m.
NER Named-entity recognition batch_69e514f0b5a881908056d48bc48124b8 completed April 19, 2026, 5:46 p.m.
NED1 Entity disambiguation (via context triple) batch_6a03cc21d5cc81909f8a154e400b02ad completed May 13, 2026, 12:56 a.m.
NEDg Description generation batch_6a03d0debb7c8190b781d913052f3be3 completed May 13, 2026, 1:16 a.m.
NED2 Entity disambiguation (via description) batch_6a03d154ca208190bf1db64c3193cdb0 completed May 13, 2026, 1:18 a.m.
Created at: April 10, 2026, 10:37 a.m.