Triple

T17677318
Position Surface form Disambiguated ID Type / Status
Subject occam programming language E440672 entity
Predicate designedFor P98 FINISHED
Object INMOS Transputer
The INMOS Transputer was a pioneering microprocessor architecture from the 1980s designed for scalable parallel computing, notable for integrating processor, memory, and high-speed serial communication links on a single chip.
E1283922 NE FINISHED

How this triple was built (4 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: INMOS Transputer | Statement: [occam programming language, designedFor, INMOS Transputer]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: INMOS Transputer
Context triple: [occam programming language, designedFor, INMOS Transputer]
  • A. POWER2 RISC processor
    The POWER2 RISC processor is IBM’s second-generation high-performance Reduced Instruction Set Computing microprocessor, used primarily in RS/6000 workstations and servers during the early to mid-1990s.
  • B. Ivory microprocessor
    The Ivory microprocessor is a specialized Lisp processor designed to efficiently run Symbolics' advanced AI and symbolic computing systems.
  • C. Acorn RISC Machine
    Acorn RISC Machine (ARM) is a family of energy-efficient reduced instruction set computer (RISC) architectures widely used in mobile devices, embedded systems, and increasingly in servers and personal computers.
  • D. Acorn MOS
    Acorn MOS is the proprietary operating system developed by Acorn Computers for its 8-bit microcomputers, most notably the BBC Micro series.
  • E. Crusoe microprocessor
    The Crusoe microprocessor is a low-power, x86-compatible CPU line from Transmeta that used code-morphing software to translate x86 instructions to an underlying VLIW architecture, targeting laptops and mobile devices.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: INMOS Transputer
Triple: [occam programming language, designedFor, INMOS Transputer]
Generated description
The INMOS Transputer was a pioneering microprocessor architecture from the 1980s designed for scalable parallel computing, notable for integrating processor, memory, and high-speed serial communication links on a single chip.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07
Target entity: INMOS Transputer
Target entity description: The INMOS Transputer was a pioneering microprocessor architecture from the 1980s designed for scalable parallel computing, notable for integrating processor, memory, and high-speed serial communication links on a single chip.
  • A. POWER2 RISC processor
    The POWER2 RISC processor is IBM’s second-generation high-performance Reduced Instruction Set Computing microprocessor, used primarily in RS/6000 workstations and servers during the early to mid-1990s.
  • B. Ivory microprocessor
    The Ivory microprocessor is a specialized Lisp processor designed to efficiently run Symbolics' advanced AI and symbolic computing systems.
  • C. Acorn RISC Machine
    Acorn RISC Machine (ARM) is a family of energy-efficient reduced instruction set computer (RISC) architectures widely used in mobile devices, embedded systems, and increasingly in servers and personal computers.
  • D. Acorn MOS
    Acorn MOS is the proprietary operating system developed by Acorn Computers for its 8-bit microcomputers, most notably the BBC Micro series.
  • E. Crusoe microprocessor
    The Crusoe microprocessor is a low-power, x86-compatible CPU line from Transmeta that used code-morphing software to translate x86 instructions to an underlying VLIW architecture, targeting laptops and mobile devices.
  • F. None of above. chosen

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d8b9e940b081908b862bb0e6e89b0d completed April 10, 2026, 8:50 a.m.
NER Named-entity recognition batch_69e46f6e959c819092d9d33e79bd51f7 completed April 19, 2026, 6 a.m.
NED1 Entity disambiguation (via context triple) batch_6a023016caf4819092c676c0105dcfd4 completed May 11, 2026, 7:37 p.m.
NEDg Description generation batch_6a02309eb7ac81908133a41136fbaac5 completed May 11, 2026, 7:40 p.m.
NED2 Entity disambiguation (via description) batch_6a02313b69888190935d7c95ab273ec1 completed May 11, 2026, 7:42 p.m.
Created at: April 10, 2026, 10:01 a.m.