Triple

T17531755
Position Surface form Disambiguated ID Type / Status
Subject National Institute of Technology Kurukshetra E426951 entity
Predicate hasDepartment P35 FINISHED
Object School of VLSI Design and Embedded Systems
The School of VLSI Design and Embedded Systems is an academic department specializing in very-large-scale integration (VLSI) and embedded system technologies, offering advanced education and research in microelectronics and related fields.
E1273093 NE FINISHED

How this triple was built (4 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: School of VLSI Design and Embedded Systems | Statement: [National Institute of Technology Kurukshetra, hasDepartment, School of VLSI Design and Embedded Systems]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: School of VLSI Design and Embedded Systems
Context triple: [National Institute of Technology Kurukshetra, hasDepartment, School of VLSI Design and Embedded Systems]
  • A. VLSI technology
    VLSI technology (Very Large Scale Integration) is the process of creating integrated circuits by combining thousands to millions of transistors on a single chip, enabling complex and high-performance electronic systems.
  • B. VLSI theory
    VLSI theory is a field of computer science and electrical engineering that studies the design, analysis, and complexity of highly parallel and efficient digital circuits and systems built with very-large-scale integration technology.
  • C. IEEE Transactions on Very Large Scale Integration (VLSI) Systems
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems is a peer-reviewed scholarly journal focusing on the design, analysis, and implementation of VLSI and integrated systems.
  • D. School of Microelectronics and Solid‑State Electronics
    The School of Microelectronics and Solid‑State Electronics is an academic unit specializing in microelectronic engineering and solid-state device research and education within the University of Electronic Science and Technology of China.
  • E. Mead–Conway VLSI design revolution
    The Mead–Conway VLSI design revolution was a transformative shift in microchip design methodology that introduced simplified, scalable design rules and modular, high-level approaches, enabling widespread, university-level integrated circuit design and catalyzing the modern semiconductor industry.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: School of VLSI Design and Embedded Systems
Triple: [National Institute of Technology Kurukshetra, hasDepartment, School of VLSI Design and Embedded Systems]
Generated description
The School of VLSI Design and Embedded Systems is an academic department specializing in very-large-scale integration (VLSI) and embedded system technologies, offering advanced education and research in microelectronics and related fields.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07
Target entity: School of VLSI Design and Embedded Systems
Target entity description: The School of VLSI Design and Embedded Systems is an academic department specializing in very-large-scale integration (VLSI) and embedded system technologies, offering advanced education and research in microelectronics and related fields.
  • A. VLSI technology
    VLSI technology (Very Large Scale Integration) is the process of creating integrated circuits by combining thousands to millions of transistors on a single chip, enabling complex and high-performance electronic systems.
  • B. VLSI theory
    VLSI theory is a field of computer science and electrical engineering that studies the design, analysis, and complexity of highly parallel and efficient digital circuits and systems built with very-large-scale integration technology.
  • C. IEEE Transactions on Very Large Scale Integration (VLSI) Systems
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems is a peer-reviewed scholarly journal focusing on the design, analysis, and implementation of VLSI and integrated systems.
  • D. School of Microelectronics and Solid‑State Electronics
    The School of Microelectronics and Solid‑State Electronics is an academic unit specializing in microelectronic engineering and solid-state device research and education within the University of Electronic Science and Technology of China.
  • E. Mead–Conway VLSI design revolution
    The Mead–Conway VLSI design revolution was a transformative shift in microchip design methodology that introduced simplified, scalable design rules and modular, high-level approaches, enabling widespread, university-level integrated circuit design and catalyzing the modern semiconductor industry.
  • F. None of above. chosen

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d889de677081909b22d2657b1f0292 completed April 10, 2026, 5:25 a.m.
NER Named-entity recognition batch_69e453695734819092d4dcbab4a4fa01 completed April 19, 2026, 4 a.m.
NED1 Entity disambiguation (via context triple) batch_6a01c94b1ad48190b06c23661ac2d19c completed May 11, 2026, 12:19 p.m.
NEDg Description generation batch_6a01c9efa2408190992ac4ecea051f2b completed May 11, 2026, 12:22 p.m.
NED2 Entity disambiguation (via description) batch_6a01caed0ed08190b76f485cab1da514 completed May 11, 2026, 12:26 p.m.
Created at: April 10, 2026, 5:49 a.m.