Triple
T15999462
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Hitachi SH-4 |
E388057
|
entity |
| Predicate | family |
P566
|
FINISHED |
| Object |
SH-4 series
The SH-4 series is a line of 32-bit RISC microprocessors from Hitachi (later Renesas) widely used in embedded systems and notably in the Sega Dreamcast game console.
|
E1187758
|
NE FINISHED |
How this triple was built (4 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: SH-4 series | Statement: [Hitachi SH-4, family, SH-4 series]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: SH-4 series Context triple: [Hitachi SH-4, family, SH-4 series]
-
A.
SH-1
SH-1 is the first-generation implementation of the SuperH 32-bit RISC microprocessor architecture developed for embedded systems.
-
B.
SH-5
SH-5 is a 64-bit member of the SuperH family of RISC microprocessor cores designed for embedded and high-performance applications.
-
C.
SH-16
SH-16 is a state highway in Oklahoma that serves as a regional route connecting several towns and rural areas in the state.
-
D.
SH-20
SH-20 is a state highway in Oklahoma that runs east–west across the northeastern part of the state, connecting several towns and serving as a regional transportation route.
-
E.
SH-3
SH-3 is a 32-bit member of the SuperH family of RISC microprocessor cores, designed for embedded systems and known for its compact, efficient instruction set.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg
Description generation
gpt-5.1
Instruction
Generate a one-sentence description of the target entity. You are given a context triple in the form (subject, predicate, object), where the object is the target entity. # Instructions Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. Avoid repeating the information from the triple, unless really essential. # Response Format Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: SH-4 series Triple: [Hitachi SH-4, family, SH-4 series]
Generated description
The SH-4 series is a line of 32-bit RISC microprocessors from Hitachi (later Renesas) widely used in embedded systems and notably in the Sega Dreamcast game console.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: SH-4 series Target entity description: The SH-4 series is a line of 32-bit RISC microprocessors from Hitachi (later Renesas) widely used in embedded systems and notably in the Sega Dreamcast game console.
-
A.
SH-1
SH-1 is the first-generation implementation of the SuperH 32-bit RISC microprocessor architecture developed for embedded systems.
-
B.
SH-5
SH-5 is a 64-bit member of the SuperH family of RISC microprocessor cores designed for embedded and high-performance applications.
-
C.
SH-16
SH-16 is a state highway in Oklahoma that serves as a regional route connecting several towns and rural areas in the state.
-
D.
SH-20
SH-20 is a state highway in Oklahoma that runs east–west across the northeastern part of the state, connecting several towns and serving as a regional transportation route.
-
E.
SH-3
SH-3 is a 32-bit member of the SuperH family of RISC microprocessor cores, designed for embedded systems and known for its compact, efficient instruction set.
- F. None of above. chosen
Provenance (5 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d86daa562c81908aacc179c0fe8fb5 |
completed | April 10, 2026, 3:25 a.m. |
| NER | Named-entity recognition | batch_69e1578a0adc819097c6a23514182173 |
completed | April 16, 2026, 9:41 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69ffc3d99ca08190a3d07a0802b1b24a |
completed | May 9, 2026, 11:31 p.m. |
| NEDg | Description generation | batch_69ffc44e8b0c81909b8af9006aa5fc4d |
completed | May 9, 2026, 11:33 p.m. |
| NED2 | Entity disambiguation (via description) | batch_69ffc4bdf840819085e0a537e126c704 |
completed | May 9, 2026, 11:35 p.m. |
Created at: April 10, 2026, 4:55 a.m.