hasInstructionSet
P78644
predicate
Indicates that one entity (typically a processor or system) is defined as using or supporting a particular instruction set.
All labels observed (12)
| Label | Occurrences |
|---|---|
| supportsInstructionSetExtensions | 7 |
| hasInstructionSet canonical | 5 |
| supportedInstructionSet | 5 |
| supportedInstructionSetExtensions | 4 |
| usesInstructionSet | 4 |
| toInstructionSet | 3 |
| instructionSetFamily | 2 |
| supportsInstructionSetArchitecture | 2 |
| sourceInstructionSet | 1 |
| supportsSSE4.2 | 1 |
| targetInstructionSet | 1 |
| underlyingInstructionSet | 1 |
Description generation (PDg)
The one-sentence description above was generated by prompting gpt-5.1 with the predicate name and this instruction.
Instruction
Given a predicate that represents a relationship or action between entities, generate a one-sentence description explaining its meaning. # Instructions Focus on describing the relationship, not the entities themselves. # Response Format Begin the description with \' Indicates...\'
Input
Predicate: hasInstructionSet
Generated description
Indicates that one entity (typically a processor or system) is defined as using or supporting a particular instruction set.
Sample triples (36)
| Subject | Object |
|---|---|
| MMIX | MMIX instruction set ⓘ |
| PDP-11 | PDP-11 instruction set ⓘ |
| Intel Core m3-8100Y | SSE4.1 via predicate surface "supportsInstructionSetExtensions" ⓘ |
| Intel Core m3-8100Y | SSE4.2 via predicate surface "supportsInstructionSetExtensions" ⓘ |
| Intel Core m3-8100Y | AVX2 via predicate surface "supportsInstructionSetExtensions" ⓘ |
| Intel Core i3-10100Y | yes via predicate surface "supportsSSE4.2" ⓘ |
| Crusoe microprocessor | proprietary VLIW instruction set via predicate surface "underlyingInstructionSet" ⓘ |
| Samsung Exynos SoCs |
ARMv7-A
via predicate surface "usesInstructionSet"
ⓘ
linked to:
ARMv7-A architecture
|
| Samsung Exynos SoCs | ARMv8-A via predicate surface "usesInstructionSet" ⓘ |
| Samsung Exynos SoCs | ARMv9-A via predicate surface "usesInstructionSet" ⓘ |
| PIC microcontrollers | proprietary PIC instruction set ⓘ |
| ICL 2900 series | 2900 architecture instruction set via predicate surface "instructionSetFamily" ⓘ |
| Socket AM2 | SSE2 via predicate surface "supportedInstructionSetExtensions" ⓘ |
| Socket AM2 | SSE3 via predicate surface "supportedInstructionSetExtensions" ⓘ |
| Socket AM2 | AMD64 via predicate surface "supportedInstructionSetExtensions" ⓘ |
| Socket AM2 | NX bit via predicate surface "supportedInstructionSetExtensions" ⓘ |
| Socket AM3 | SSE2 via predicate surface "supportsInstructionSetExtensions" ⓘ |
| Socket AM3 | SSE3 via predicate surface "supportsInstructionSetExtensions" ⓘ |
| Socket AM3 | SSE4a via predicate surface "supportsInstructionSetExtensions" ⓘ |
| Socket AM3 |
AMD64
via predicate surface "supportsInstructionSetExtensions"
ⓘ
linked to:
AMD64 architecture
|
| Samsung Xclipse |
AMD RDNA shader ISA
via predicate surface "usesInstructionSet"
ⓘ
linked to:
AMD RDNA
|
| MIXAL |
MIX instruction set
ⓘ
linked to:
MIXAL
|
| Prescott | x86 via predicate surface "supportedInstructionSet" ⓘ |
| Prescott | MMX via predicate surface "supportedInstructionSet" ⓘ |
| Prescott | SSE via predicate surface "supportedInstructionSet" ⓘ |
| Prescott | SSE2 via predicate surface "supportedInstructionSet" ⓘ |
| Prescott | SSE3 via predicate surface "supportedInstructionSet" ⓘ |
| R3000 | MIPS I via predicate surface "instructionSetFamily" ⓘ |
|
SuperH-5
linked to:
SuperH-5 (SH-5)
|
SuperH-5 ISA
ⓘ
linked to:
Hitachi SH-2
|
| PowerPC-to-Intel Mac architecture transition | x86 via predicate surface "toInstructionSet" ⓘ |
| PowerPC-to-Intel Mac architecture transition | IA-32 via predicate surface "toInstructionSet" ⓘ |
| PowerPC-to-Intel Mac architecture transition | x86-64 via predicate surface "toInstructionSet" ⓘ |
| Code Morphing Software | x86 via predicate surface "sourceInstructionSet" ⓘ |
| Code Morphing Software | VLIW via predicate surface "targetInstructionSet" ⓘ |
| Regor (cut-down) | x86-64 via predicate surface "supportsInstructionSetArchitecture" ⓘ |
| Regor (cut-down) | x86 via predicate surface "supportsInstructionSetArchitecture" ⓘ |