HT Technology

E653445

HT Technology is Intel's simultaneous multithreading feature that allows a single physical processor core to appear as multiple logical cores to improve parallel performance.

All labels observed (1)

Label Occurrences
HT Technology canonical 1

How this entity was disambiguated

Statements (46)

Predicate Object
instanceOf CPU microarchitecture feature ⓘ
Intel technology feature ⓘ
simultaneous multithreading technology ⓘ
alsoKnownAs Hyper-Threading Technology ⓘ
Intel Hyper-Threading ⓘ
appliesTo Intel Core processors ⓘ
Intel Xeon processors ⓘ
linked to: Intel Xeon

Intel processors ⓘ
x86 processors ⓘ
basedOn simultaneous multithreading ⓘ
benefitDependsOn operating system scheduler implementation ⓘ
workload characteristics ⓘ
category CPU performance optimization ⓘ
processor parallelism feature ⓘ
configurable can be enabled or disabled in system BIOS ⓘ
developer Intel ⓘ
linked to: Intel Corporation
effect allows one physical core to appear as multiple logical cores ⓘ
can improve system responsiveness under load ⓘ
enables multiple hardware threads per core ⓘ
improves performance in multithreaded workloads ⓘ
featureOf Intel Haswell microarchitecture ⓘ
Intel Nehalem microarchitecture ⓘ
Intel NetBurst microarchitecture ⓘ
linked to: NetBurst

Intel Sandy Bridge microarchitecture ⓘ
linked to: Intel Sandy Bridge

Intel Skylake microarchitecture ⓘ
Intel server platforms ⓘ
introducedByProduct Intel Xeon processors (NetBurst generation) ⓘ
Pentium 4 processors (selected models) ⓘ
linked to: Pentium 4
logicalProcessorRatio typically two logical processors per physical core ⓘ
manufacturer Intel ⓘ
linked to: Intel Corporation
marketingNameOf Intel simultaneous multithreading implementation ⓘ
mayCause increased side-channel attack surface ⓘ
resource contention between hardware threads ⓘ
purpose better utilize execution resources ⓘ
improve parallel performance ⓘ
increase CPU throughput ⓘ
requires operating system support for logical processors ⓘ
scheduler awareness of logical cores ⓘ
securityConcern has been disabled in some security-sensitive environments ⓘ
shares L1 cache between logical processors on the same core ⓘ
L2 cache between logical processors on the same core ⓘ
branch predictor between logical processors ⓘ
execution pipelines between logical processors ⓘ
status widely used in modern Intel CPUs ⓘ
uses separate architectural state per hardware thread ⓘ
shared execution units within a core ⓘ

How these facts were elicited

Referenced by (1)

Full triples — surface form annotated when it differs from this entity's canonical label.