Washington Treaty

E254247

The Washington Treaty is an international agreement that establishes intellectual property protection standards for the layout designs of integrated circuits.

All labels observed (1)

Label Occurrences
Washington Treaty canonical 1

How this entity was disambiguated

Statements (47)

Predicate Object
instanceOf intellectual property treaty ⓘ
international treaty ⓘ
treaty on layout-designs of integrated circuits ⓘ
aimsTo harmonize protection of layout-designs of integrated circuits among states ⓘ
prevent unauthorized copying of layout-designs of integrated circuits ⓘ
promote innovation in semiconductor technology ⓘ
appliesTo integrated circuits ⓘ
layout-designs embodied in integrated circuits ⓘ
defines layout-design of an integrated circuit ⓘ
original layout-design ⓘ
excludesFromProtection concepts or methods underlying a layout-design ⓘ
ideas, processes, systems, or techniques embodied in a layout-design ⓘ
field industrial property ⓘ
intellectual property law ⓘ
hasAlternativeName IPIC Treaty ⓘ
Treaty on Intellectual Property in Respect of Integrated Circuits ⓘ
hasLanguage Arabic ⓘ
Chinese ⓘ
English ⓘ
French ⓘ
Russian ⓘ
Spanish ⓘ
hasProtectionCriterion fixation of layout-design in a material form ⓘ
originality of layout-design ⓘ
hasProtectionTerm limited duration of exclusive rights in layout-designs ⓘ
hasShortName Washington Treaty on Intellectual Property in Respect of Integrated Circuits ⓘ
influenced national laws on layout-designs of integrated circuits ⓘ
isPartOf international framework for protection of intellectual property in technology ⓘ
isRelatedTo World Intellectual Property Organization ⓘ
protection of semiconductor chip topographies ⓘ
legalDomain international intellectual property law ⓘ
protects right holders of layout-designs of integrated circuits ⓘ
providesFor limitations for acts done privately and for non-commercial purposes ⓘ
limitations for analysis, evaluation, or teaching of layout-designs ⓘ
limitations for creation of an original layout-design based on analysis of another layout-design ⓘ
minimum scope of exclusive rights in layout-designs ⓘ
national treatment for foreign right holders ⓘ
possible compulsory licenses or government use under certain conditions ⓘ
regulates conditions for protection of layout-designs of integrated circuits ⓘ
exclusive rights in layout-designs of integrated circuits ⓘ
limitations and exceptions to protection of layout-designs of integrated circuits ⓘ
minimum standards of protection for layout-designs of integrated circuits ⓘ
protection of layout-designs of integrated circuits ⓘ
term of protection for layout-designs of integrated circuits ⓘ
requires member states to provide legal remedies against infringement of protected layout-designs ⓘ
subjectMatter layout-designs of integrated circuits ⓘ
topographies of integrated circuits ⓘ

How these facts were elicited

Referenced by (1)

Full triples — surface form annotated when it differs from this entity's canonical label.